 OpenSPARC - http://www.sun.com/processors/opensparc/ Main Sun pages on project: links, articles, documents, FAQ, contest. |
 Free SPARC VHDL Model Available - http://groups.google.com/group/comp.arch.fpga/msg/e9000f25e6a53c58 Announcement of open source LEON SPARC architecture; Google Groups. |
 Sun Releases Complete Chip Design for Free - http://news.cnet.com/2100-1040-215335.html Download full MicroSPARC-IIep design for free under terms of Sun Community Source License. [CNET News.com] |
 Sun Extends Community Source Licensing to Chip Architectures - http://sun.systemnews.com/fullsource?article=1502 Sun Microsystems announces: for research uses, it extends its new Community Source Licensing model to picoJava and SPARC architectures; the first time a company made major microprocessor intellectual property available via open licensing. |
 LEON2FT Notes - http://microelectronics.esa.int/core/ipdoc/leon2ft_notes.txt Functional SPARC compatible processor core. Fault tolerant version of LEON2, derived from LEON-1 integer unit, implemented as highly configurable, synthesizable VHDL model. Runs on Altera, Mietec, Temic MG2, Xilinx. Designed for outer space uses. Open source, GPL. European Space Agency, ESA. |
 OpenSPARC T1 FPGA Work - http://fpga.sunsource.net/ Processor implementation for field programmable gate arrays. SunSource.net. |
 OpenSPARC T1 - http://opensparc-t1.sunsource.net/ Open source version of UltraSPARC T1 processor, with CoolThreads technology; high throughput, low power, for high performance per watt; 32 simultaneous processing threads, uses about as much power as a light bulb. SunSource.net. |
 OpenSPARC.net - http://www.opensparc.net/ Sun Microsystems initiative to create open source community and participation in processor architecture development; news, documents, analysis, downloads. |
 Simply RISC - http://www.srisc.com/ Designs and supports open-source RISC processors, systems, peripherals; sells S1 Core, a 64-bit Wishbone-compliant CPU Core based on reduced Sun Microsystems OpenSPARC T1 microprocessor. Catania, Italy; Bristol, UK. |
 Gaisler Research AB - http://www.gaisler.com/cms4_5_3/ Provides IP cores, supporting development tools for embedded processors based on SPARC architecture. Key product: LEON synthesizable processor model, full development environment, and library of IP cores, GRLIB. Göteborg, Sweden. |
 S1 Core - http://s1.sunsource.net/ This core (codename Sirocco) is one 64-bit core from the OpenSPARC T1 8 core processor (codename Niagara), plus a Wishbone bridge, reset controller, and basic interrupt controller, to make it easy for engineers to integrate the design. SunSource.net. |